|
Synopsys Introduces Formality With Advanced Hier-IQ Technology
MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Oct. 3, 2001--Synopsys,
Inc. (Nasdaq:SNPS) today announced the release of its Formality®
2001.08 equivalence checker with advanced Hier-IQ technology, which
contributes significantly to Formality's dramatic 10X runtime and 3X
capacity gains for multimillion-gate verification.
Formality's Hier-IQ technology combines hierarchical
verification's performance and memory advantages with flat
verification's accuracy and ease-of-use. By delivering
industry-leading 2K-gates/MB capacity, Formality easily verifies large
multimillion-gate designs even on current 32-bit Unix and Linux
systems. Formality 2001.08 also supports 64-bit Unix systems.
``If you evaluated Formality a year ago, I suggest you ignore the
results,'' says Paul Pontin, Vice President, Semiconductor Engineering
at 3Dlabs®, Inc., Ltd. (Nasdaq:TDDD). ``The latest version is streets
ahead in terms of memory use and runtimes. We have seen up to 30X
speed improvement and 3X memory reduction compared to version
2000.05.''
Using proprietary algorithms, Hier-IQ takes advantage of
hierarchical design information while considering the design in its
entire context. This capability eliminates false-negative results
common to hierarchical verification without suffering from the
performance and verification challenges of flat verification. Hier-IQ
requires no extra setup even when faced with the following
hierarchical verification challenges inherent in advanced RTL-to-gate
design flows: boundary optimization, inversion push, place-and-route
IPO, clock-tree insertion, and flattening. Formality's new methodology
delivers fast time to results due to its easy setup, increased
verification performance, and elimination of verification iterations
caused by false-negative results.
``Formality's latest advancements place Synopsys at the forefront
of Formal Verification technology,'' says Bijan Kiani, Vice President
of Marketing, Nanometer Analysis and Test. ``Our customers are
confirming Formality's capacity and performance leadership. Synopsys'
technology commitment, complemented by world-class support and
services, is driving Formality's rapid adoption by the top design
houses.''
Formality 2001.08 is available today and supports Hewlett Packard,
Sun Microsystems, IBM and Linux operating systems. For more
information on Formality equivalence checker and Hier-IQ, visit
http://www.synopsys.com/products/verification.
About Synopsys
Synopsys, Inc. (Nasdaq: SNPS), headquartered in Mountain View,
California, creates leading electronic design automation (EDA) tools
for the global electronics market. The company delivers advanced
design technologies and solutions to developers of complex integrated
circuits, electronic systems and systems on a chip. Synopsys also
provides consulting and support services to simplify the overall IC
design process and accelerate time to market for its customers. Visit
Synopsys at http://www.synopsys.com.
Synopsys and Formality are registered Synopsys Inc. All other
trademarks or registered trademarks mentioned in this release are the
intellectual property of their respective owners.
Contact:
Synopsys, Inc.
Nancy Renzullo, 650/584-1669
renzullo@synopsys.com
or
KVO Public Relations
Christina Castillo, 503/221-2355
christina_castillo@kvo.com
|
|
CaféTalk |
